Generally, a sense amplifier pull-up voltage is maintained for a predetermined time, when a word line is enabled in a semiconductor memory device. At this time, a supply voltage VDD, which is higher than an internal voltage VCORE, is used as the voltage level of the sense amplifier pull-up voltage in order to increase the sensing speed in amplifying a voltage difference between two bit lines BL and /BL, which share charge with each other before a data input/output operation.
This is called “over-driving” and the pull-up voltage of the sense amplifier is maintained at the internal voltage VCORE after the over-driving. In this processing, since the internal voltage VCORE is increased, an internal voltage control apparatus is required to return the increased internal voltage VCORE to the original internal voltage.
FIG. 1 is a block diagram illustrating a structure of a conventional internal voltage control apparatus, and FIG. 2 is a timing chart showing the operation of the internal voltage control apparatus in FIG. 1.
Referring to FIG. 1, the conventional internal voltage control apparatus includes a first driving signal generating unit 100 to generate a driving signal DRV_ONB for a boosted voltage of an internal voltage VCORE, a second driving signal generating unit 200 to generate a driving signal RELEASE_ON for a voltage drop of the internal voltage VCORE, and a driving unit 300 to drive the internal voltage VCORE in response to the driving signals DRV_ONB and RELEASE_ON.
This internal voltage generating unit drives the first driving signal generating unit 100 and the second driving signal generating unit 200, in accordance with the voltage level of the internal voltage VCORE when an active signal ACTIVE is enabled.
The first driving signal generating unit 100 performs the voltage boosting operation of the internal voltage VCORE when the internal voltage VCORE is lower than a reference voltage VREFC, and the second driving signal generating unit 200 performs the voltage drop operation of the internal voltage VCORE when the internal voltage VCORE is higher than a reference voltage VREFC.
Referring to FIG. 2, since the conventional internal voltage control apparatus is driven only by the internal voltage VCORE in a state where the active signal ACTIVE is enabled, unnecessary operation is carried out in an operation section to return the boosted voltage to the original internal voltage. Further, in the case where the response time of the first driving signal generating unit 100 is different from that of the second driving signal generating unit 200, there is a problem in that current consumption is increased because the first and second driving signal generating units 100 and 200 can operate simultaneously.